FPGA Software Developer (Onsite Contractor) 


 In this position you will be responsible for FPGA Software Development. Your responsibilities will include architectural design of products and performing a key role in the development of various software’s. You will be responsible for the overall evaluation of code being migrated to FPGA. As Tecore’s FPGA Software Developer, you will partner with Tecore’s software development experts, leveraging your knowledge of FPGA to ensure continuity between customer needs, market trends, and our product road map.


As Tecore’s FPGA Software Developer, you will be responsible for the following:

  • Participates in architectural design of products and performs a key role in the development of software migrated from DSP Tigershark product line to XiLink FPGA.
  • Performs a lead role in software development lifecycle to develop and manage the DSP migration to FPGA.
  • Performs risk analysis of proposed approaches to find the optimal design solutions.
  • Considers economic and business factors when making decisions which impact development cost or product features.
  • Responsible for overall evaluation, testing, measurement, and debugging of code being migrated to the FPGA.
  • Directs and assists other developers in achieving the migration path to the FPGA (train others as needed).
  • Develops and documents product system specifications, test procedures, code reviews, and test matrices.
  • Documents software anomalies, defects or enhancement features in the internal corrective action/defect database.
  • Evaluates and recommends/selects third party software packages which most closely meet the project requirements, for making build/buy decisions, and for the generation of specifications for purchased software.
  • Oversees the evaluation and selection of software development tools as required for the migration project.
  • Assists other developers in technical areas and problem resolution.
  • Provides progress updates and technical updates to the project manager
  • Undertakes/Oversees any other activity/project as requested by supervisor

About You

  • Education: Bachelor’s degree in Computer Science, Electrical Engineering, Computer Engineering plus 8 years related experience, or Master’s degree with 6 years related experience.
  • Experience with system integration and testing is required.
  • Substantial experience in FPGA Development or programming as well as DSP embedded knowledge.
  • An appreciation of Digital HW Design.
  • Must be able to work M-F from our corporate headquarters in Hanover, MD.
  • Must be authorized to work in the United States.
  • This position requires an individual with in depth technical expertise and competency of the DSPs and FPGA.
  • Intrinsic knowledge of the software development life-cycle.
  • Demonstrates effective verbal and non-verbal communication skills.
  • Knowledge in C/ASM.
  • Experience of ARM SoC.
  • Working knowledge of the following engineering tools: XiLink ISE/EDK and CVS.
  • Scripting: tcl/tk.
  • Knowledge in OSE ENEA to complete the migration cycle.
  • Requires working knowledge of most major areas of software and system design.
  • Must demonstrate skills to successfully evaluate risks of project path.
  • Must be able to work with minimum direction, establish priorities, solve problems, and delegate tasks.
  • Preferred but no required to have experience in engineering development in the V model environment.
  • Ability to be an innovative thinker and problem solver.
  • Having the ability to effectively research and solve complex technological issues.
  • General familiarity with digital communications protocols.

DISCLAIMER: The above statements are intended to describe the general nature and level of work being performed by employees assigned to this classification. They are not intended to be construed as an exhaustive list of all responsibilities, duties and skills required of employees assigned to this position. Therefore employees assigned may be required to perform additional job tasks required by the manager.